Main > ELECTRONICS. > SemiConductor > Coating > AntiReflective Coating > Deep UV PhotoLithograghy > Silicon Oxime

Product USA. A

PATENT NUMBER This data is not available for free
PATENT GRANT DATE April 2, 2002
PATENT TITLE Process for forming anti-reflective film for semiconductor fabrication using extremely short wavelength deep ultraviolet photolithography

PATENT ABSTRACT An anti-reflective film for deep ultraviolet (DUV) photolithograghy includes silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.2, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively. The film is characterized by a substantial lack of bonding between silicon atoms and oxygen atoms, and has a thickness of less than approximately 600 .ANG. which is selected to produce destructive interference between incident and reflected light at a selected DUV wavelength
PATENT INVENTORS This data is not available for free
PATENT ASSIGNEE This data is not available for free
PATENT FILE DATE January 19, 1999
PATENT REFERENCES CITED Ogawa et al, Practical resolution enhancement effect by new complete anti-reflective layer in KrF excimer laser lithography, Proc. SPIE-Int. Soc. opt. Eng. (1993) 1927 (Optical/Laser Microlithography, Part 1) p. 263-74, 1993.
PATENT PARENT CASE TEXT This data is not available for free
PATENT CLAIMS What is claimed is:

1. An anti-reflective film for deep ultraviolet (DUV) photolithography, comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, characterized by:

a substantial lack of bonding between silicon atoms and oxygen atoms; and

a thickness of less than approximately 800 .ANG. which is selected to produce destructive interference between incident and reflected light at a selected DUV wavelength.

2. A film as in claim 1, having a thickness between approximately 100 .ANG. and 600 .ANG..

3. A film as in claim 1, having an index of refraction of approximately 1.9 to 2.7, and an extinction coefficient of approximately 0.2 to 1.0.

4. A film as in claim 1, having a silicon concentration of approximately 40 to 50 atomic percent.

5. A film as in claim 1, having a silicon concentration which ranges from approximately 40 to 50 atomic percent for a selected wavelength range of approximately 157 nm to 248 nm respectively.

6. A film as in claim 1, having a thickness of approximately 300 .ANG..+-.20% for a selected DUV wavelength of 248 nm.

7. A film as in claim 1, having a thickness of approximately 250 .ANG..+-.20% for a selected DUV wavelength of 193 nm.

8. A film as in claim 1, having a thickness of approximately 200 .ANG..+-.20% for a selected DUV wavelength of 157 nm.

9. An anti-reflective film for deep ultraviolet (DUV) photolithography, comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, characterized by:

a substantial lack of bonding between silicon atoms and oxygen atoms; and

being soluble in hot phosphoric acid.

10. A film as in claim 9, having a thickness of approximately 100 .ANG. to 800 .ANG..

11. A film for photolithography, comprising silicon oxime having the formula Si.sub.(1-x30 y+z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, characterized by:

a substantial lack of bonding between silicon atoms and oxygen atoms; and

being soluble in hot phosphoric acid.

12. A film as in claim 11, having a thickness of approximately 100 .ANG. to 800 .ANG..

13. A process for forming an anti-reflective film for deep ultraviolet (DUV) lithography, comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, comprising reacting sources of silicon, nitrogen, oxygen and hydrogen in the presence of a stoichiometric excess of nitrogen sufficient to substantially prevent bonding between silicon atoms and oxygen atoms, the film having a thickness of less than approximately 800 .ANG., which is selected to produce destructive interference between incident and reflected light at a selected DUV wavelength.

14. A process as in claim 13, comprising forming the film at a temperature of approximately 200.degree. C. to 600.degree. C.

15. A process as in claim 13, comprising forming the film at a temperature of approximately 275.degree. C. to 475.degree. C.

16. A process as in claim 13, comprising forming the film at a temperature of approximately 480.degree. C. to 600.degree.C.

17. A process as in claim 13, comprising forming the film to a thickness approximately 100 .ANG. to 600 .ANG..

18. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the film has an index of refraction of approximately 1.9 to 2.7, and an extinction coefficient of approximately 0.2 to 1.0.

19. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the film has a silicon content of approximately 40% to 50%.

20. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the film has a silicon concentration which ranges from approximately 40 to 50 atomic percent for a selected wavelength range of approximately 157 nm to 248 nm respectively.

21. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the film has a thickness of approximately 300 .ANG..+-.20% for a selected DUV wavelength of 248 nm.

22. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the 25 film has a thickness of approximately 250 .ANG..+-.20% for a selected DUV wavelength of 193 nm.

23. A process as in claim 13, comprising controlling the sources of silicon, nitrogen, oxygen and hydrogen such that the film has a thickness of approximately 200 .ANG..+-.20% for a selected DUV wavelength of 175 nm.

24. A process for forming an anti-reflective film for deep ultraviolet (DUV) photolithography, comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, comprising controllably reacting sources of silicon, nitrogen, oxygen, and hydrogen in the presence of a stoichiometric excess of nitrogen sufficient to substantially prevent bonding between silicon atoms and oxygen atoms, such that the film is soluble in hot phosphoric acid.

25. A process as in claim 24, comprising forming the film to a thickness of approximately 100 .ANG. to 800 .ANG..

26. A process for forming a film for photolithography, comprising silicon oxime having the formula Si.sub.(1-x+y+Z) N.sub.x O.sub.y :H.sub.z, wherein x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively, comprising controllably reacting sources of silicon, nitrogen, oxygen, and hydrogen in the presence of a stoichiometric excess of nitrogen sufficient to substantially prevent bonding between silicon atoms and oxygen atoms, such that the film is soluble in hot phosphoric acid.

27. A process as in claim 26, comprising forming the film to a thickness of approximately 100 .ANG. to 800 .ANG..
PATENT DESCRIPTION BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to the art of microelectronic integrated circuits, and more specifically to a process for forming an anti-reflective film for semiconductor fabrication using extremely short wavelength deep ultraviolet photolithography.

2. Description of the Related Art

Photolithography is a semiconductor fabrication process that is widely used for patterning material layers on a semiconductor wafer or structure. The material layers can be non-metal (e.g. silicon, polysilicon), metal (e.g. aluminum), etc.

A layer of photoresist is formed over the material layer to be patterned, and exposed to light through a mask which has opaque and transparent areas corresponding to the desired pattern. Light passing through the transparent areas in the mask causes a chemical reaction in the underlying areas of the photoresist such that these areas will be dissolved away when the wafer is exposed to a developing solution.

The result is a photoresist layer having openings therethrough which correspond to the transparent areas of the mask. The patterned photoresist layer is then used as an etch mask such that areas of the material layer which are exposed by the openings in the photoresist layer will be selectively removed upon exposure to an appropriate etching solution. This is possible by selecting the etching solution to have a much higher etch rate for the material layer than for the photoresist. Preferably the etch rate for the photoresist will be substantially zero.

With feature sizes of integrated circuits constantly shrinking, photolithographic resolution or definition is becoming increasingly sensitive to reflection during the light exposure step. This is especially problematic at very short wavelengths in the ultraviolet band, including deep ultraviolet exposure which is conventionally performed at a wavelength of 248 nanometers.

As illustrated in FIG. 1, a semiconductor structure 10 which is in an intermediate step in a fabrication process includes a material layer 12 which is to be patterned by photolithography, and a photoresist layer 14 which is formed on the material layer 12. The material layer 12 can be polysilicon which is being patterned into a field effect transistor gate or interconnect, or any other applicable material. The layer 12 is formed on a silicon or other semiconductor substrate which is not shown.

A ray of light is illustrated as entering the photoresist layer 14 at an off-normal angle as indicated at 16, and passing through the layer 14 as indicated at 18. The ray is reflected from the surface of the layer 12 back into the layer 14 as indicated at 20. The reflected ray 20 enlarges the exposed area of the photoresist layer 14 to include an area that was not intended to be exposed, resulting in a larger area being removed during development than was desired.

This phenomenon in general degrades the resolution or definition capability of the photolithographic process. Although FIG. 1 illustrates only unwanted reflection caused by off-normal incident light, light can also be reflected off underlying device features to produce similar results.

In order to inhibit reflection of light back into a photoresist layer, Bottom Anti-Reflective Coatings (BARC) have been developed as illustrated in FIG. 2, in which similar elements are designated by the same reference numerals used in FIG. 1. As viewed in the figure, an anti-reflective coating 22, also known as an anti-reflective layer or film, is provided between the material layer 12 and the photoresist layer 14.

A ray of light is incident on and passes through the photoresist layer 14 as indicated at 16,18, and a portion of this light is reflected back into the photoresist layer 14 as indicated at 20. Another portion of this light passes through the anti-reflective coating 22 as indicated at 24, is reflected from the surface of the layer 12, and passes back through the layer 22 into the layer 14 as indicated at 26.

The index of refraction n, extinction coefficient k, and thickness t of the anti-reflective coating 22 are selected such that the light 26 will be 180.degree. or 1/2 wavelength out of phase with the light 20. Destructive interference will occur between the light 20,26 in the photoresist layer 14 causing the light 20,26 to mutually cancel. In this manner, reflection of light from the surface of the material layer 12 into the photoresist layer 14 is effectively inhibited.

An anti-reflective coating 22 which is effective for deep ultraviolet lithography is described in U.S. patent application Ser. No. 08/479,718, entitled "SILICON OXIME FILM", filed Jun. 7, 1995, by D. Foote, and is incorporated herein by reference in its entirety. This coating is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) over the material layer to be patterned as described above.

The material of the coating is called silicon oxime, and has the generic chemical formulation SiNO:H, being a compound of silicon, oxygen, nitrogen, and residual hydrogen in varying proportions which are selected in accordance with a particular application. The index of refraction n, extinction coefficient k, and thickness t of the layer are selected to provide half-wavelength cancellation of light reflected into an overlying photoresist layer 14 as described above.

FIG. 3 illustrates the desired appearance of the structure 10 after a portion of the photoresist layer 14 has been exposed and developed to form an opening 14'. The layer 14 acts as an etch mask for subsequent processing such that the portions of the layer 22 and layer 12 underlying the opening 14' can be selectively removed by etching using a substance that will not significantly affect the photoresist layer 14. The walls of the opening 14 are substantially vertical as desired.

FIG. 4 is similar to FIG. 3, but illustrates "footing" which is caused by chemical interaction between the anti-reflective layer 22 and the photoresist layer 14. The footing appears as horizontally enlarged portions 22' which extend from the lower edges of the photoresist layer 14 into the opening 14'. The footing is undesirable because it degrades the resolution or definition of the photolithographic process.

Where the anti-reflective layer 22 is formed of silicon oxime as described above, the footing is caused by chemical interaction between amines (hydrogen-nitrogen bonds) in the silicon oxime layer 22 and the material of the photoresist layer. This is facilitated by the fact that silicon oxime is a base, whereas the photoresist material is an acid.

It is known that this interaction, and thereby the footing, can be inhibited by forming a silicon dioxide barrier layer on the surface of the silicon oxime layer before forming the photoresist thereon. The barrier layer acts as a seal or cap which separates the amines in the silicon oxime layer from the photoresist layer 14.

Prior art methods include forming a silicon dioxide barrier layer on a silicon oxynitride (SiON:H) layer, which is another substance used as an antireflective coating. This method includes deposition in the reactor used to form the silicon oxynitride layer itself. Such deposition is limited by conventional techniques to forming a silicon dioxide layer having a thickness in excess of 100 angstroms. A silicon dioxide layer of such thickness is difficult to remove if required in the processing environment to which the present invention relates.

Another method includes growing a silicon dioxide layer on a silicon oxime layer in a downstream plasma system using oxygen gas. This method is limited in that it is only capable of forming a silicon dioxide layer which is too thin (less than 10 angstroms) to eliminate footing.

FIG. 6 illustrates a detrimental situation which can result from removing a thick (100 angstroms or more) silicon dioxide barrier layer from a field-effect transistor structure. An exemplary semiconductor structure 30 includes a silicon substrate 32. A thin gate oxide layer 34 is formed on the substrate 32, and a polysilicon gate 36 is formed on the gate oxide. The gate 36 was photolithographically patterned, and had a silicon oxime layer, a 100+ angstrom silicon dioxide layer, and a photoresist layer formed thereon which were removed after the patterning was completed.

The silicon dioxide barrier layer was removed using a suitable etchant. In this configuration, the lateral edges of the gate oxide layer 34 were also exposed to the etchant. During the length of time required to remove the silicon dioxide layer, exposed edge portions of the layer 34 were also removed by the etchant to produce significant undercutting as indicated at 34'. This adversely affects the gate width of the transistor and the control over the underlying channel by a voltage applied to the gate 36.

As described in the above referenced U.S. Pat. No. 5,710,067, the escalating requirements for high density and performance associated with ultra large scale integration require responsive changes in conductive patterns, which is considered one of the most demanding aspects of ultra large scale integration technology. High density demands for ultra large scale integration semiconductor wiring require increasingly denser arrays with minimal spacing between conductive lines. The increasing demands for high densification impose correspondingly high demands on photolithographic techniques.

Conventional photolithographic techniques employed during various phases in the manufacture of semiconductor devices involve the formation of an anti-reflective coating (ARC), also characterized as an anti-reflective layer (ARL), typically positioned between a semiconductor substrate and a photoresist material. ARCs are conventionally made of various materials, including organic and inorganic. For example, inorganic materials conventionally employed for ARCs include silicon nitride, silicon oxynitride, .alpha.-carbon, titanium nitride, silicon carbide and amorphous silicon. Organic materials conventionally employed for ARCs include spin-on polyimides and polysulfones. Conventional ARCs are designed, by appropriate adjustment of variables such as composition, deposition conditions and reaction conditions, to exhibit the requisite optical parameters to suppress multiple interference effects caused by the interference of light rays propagating in the same direction due to multiple reflections in the photoresist film. The effective use of an ARC enables patterning and alignment without disturbance caused by such multiple interference, thereby improving line width accuracy and alignment, critical factors with respect to achieving fine line conductive patterns with minimal interwiring spacing. The use of an ARC is particularly significant when forming a via or contact hole over a stepped area, as when etching a dielectric layer deposited on a gate electrode and gate oxide formed on a semiconductor substrate in manufacturing a field effect transistor.

The physics involved in ARCs is known and the use of ARCs is conventional and, hence, will not be set forth herein detail. See, for example, T. Tanaka et al., "A New Photolithography Technique with Antireflective Coating on Resist: ARCOR," J. Electrochem. Soc., Vol. 137, No. 12, December 1990, pp. 3900-3905. ARCs have improved the accuracy of ultraviolet and deep ultraviolet lithography, and expanded to the use of ion beam, I-line, KrF and ArF excimer laser lithography. T. Ogawa et al., "SiO.sub.x N.sub.y :H, high performance anti-reflective layer for current and future optical lithography." Recently, an effort has been made to develop improved dry etching techniques for ARCs, including particularly silicon oxynitride. M. Armacost et al., "Selective Oxide: Nitride Dry Etching in a High Density Plasma Reactor," Electrochemical Society Meeting, 1993, Extended Abstract, column 93-1, p. 369. Efforts have been made to engineer the optical parameters of an ARC, as by adjusting process variables impacting the refractive index during plasma enhanced chemical vapor deposition (PECVD). T. Gocho et al., "Chemical Vapor Deposition of Anti-Reflective Layer Film for Excimer Laser Lithography," Japanese Journal of Applied Physics, Vol. 33, January 1994, Pt. 1, No. 1B, pp. 486-490.

Notwithstanding such efforts, conventional photolithographic capabilities constitute a severe limiting factor in reducing the design rule or maximum dimension of a conductive pattern and, hence, increasing densification.

Accordingly, there exists a need for materials having the requisite optical properties for use in ARCs which enable accurate control of the width of conductive lines of conductive patterns and minimizing the interwiring spacing therebetween, particularly for materials which exhibit desirable etch characteristics.

Currently, advanced photolithographic tools used in volume manufacture employ deep-ultraviolet (DUV) radiation with a wavelength of 248 nm to print features that have line widths as small as 200 nm. New DUV tools are being developed that employ radiation that has a wavelength of 193 nm, and enables optical lithography to print features as small as 100 nm. Advanced development of tools operating at a wavelength of 157 nm is being carried out, which will enable printing of features as small as 50 nm. A need exists in the art for an ARC that will be effective at these extremely short DUV wavelengths.

SUMMARY OF THE INVENTION

The present invention overcomes the drawbacks of the prior art by providing a process by which a thin silicon dioxide barrier layer can be formed on a silicon oxime anti-reflective layer. A barrier layer formed in accordance with the present invention is thick enough to inhibit interaction between the anti-reflective layer and an overlying photoresist layer and thereby prevent footing, but thin enough to be removed without causing undercutting of a gate oxide layer as described above.

In accordance with the present invention, an anti-reflective coating is formed between a material layer which is to be patterned on a semiconductor structure using photolithography, and an overlying photoresist layer. The anti-reflective coating suppresses reflections from the material layer surface into the photoresist layer that could degrade the patterning.

The anti-reflective coating includes an anti-reflective layer of silicon oxime (SiNO:H), silicon oxynitride (SiON:H), or silicon nitride (Si.sub.3 N.sub.4 :H), and a barrier layer which is grown on the anti-reflective layer using a nitrous oxide plasma discharge to convert a surface portion of the anti-reflective layer into silicon dioxide.

The barrier layer prevents interaction between the anti-reflective layer and the photoresist layer that could create footing. The anti-reflective layer is deposited on the material layer using Plasma Enhanced Chemical Vapor Deposition (PECVD) in a reactor. The barrier layer is grown on the anti-reflective layer in-situ in the same reactor, thereby maximizing throughput.

The present barrier layer is not formed by deposition as in the prior art. Instead, the barrier layer is grown by bombardment of the anti-reflective layer by ion species from the nitrous oxide plasma such that a portion of the surface of the anti-reflective layer is consumed by the reaction and converted into silicon dioxide. This enables the barrier layer to be grown to a thickness on the order of 10 to 40 (more preferably 15 to 25) angstroms, which is substantially thinner than can be formed by deposition of silicon dioxide (100 angstroms or more).

An object of the present invention is a material having optical properties suitable for use as an ARC.

Another object of the present invention is a material which exhibits high etch selectivity with respect to conventional dielectric materials employed in manufacturing semiconductor devices.

According to the present invention, the foregoing and other objects are achieved in part by a film comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z, where x, y, and z represent the atomic percentage of nitrogen, oxygen, and hydrogen, respectively.

Another aspect of the present invention is a semiconductor device having a conductive wiring pattern comprising a plurality of layers including a layer comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z.

Another aspect of the present invention is a semiconductor device having an insulating layer comprising a plurality of layers including a layer comprising silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z.

Another aspect of the present invention is a method of forming a film comprising silicon oxime, which method comprises depositing a layer of silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z on a substrate by PECVD.

A further aspect of the present invention is a method of manufacturing a semiconductor device, which method comprises depositing a layer of silicon oxime having the formula Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z by PECVD on a substrate under dynamic, non-equilibrium conditions in the presence of a stoichiometric excess of nitrogen sufficient to substantially prevent bonding between silicon atoms and oxygen atoms.

It is a yet further aspect of the present invention to provide a silicon oxime anti-reflective coating which is effective at extremely short DUV wavelengths including 248 nm, 193 nm and 157 nm.

These and other features and advantages of the present invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings, in which like reference numerals refer to like parts.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating how resolution in a photolithographic process is degraded by reflection from a material layer being patterned;

FIG. 2 is a diagram illustrating how the reflections are inhibited by an anti-reflective coating;

FIG. 3 is a sectional view illustrating a patterned photoresist layer;

FIG. 4 is similar to FIG. 3, but illustrates a patterned photoresist layer having a lower portion which is distorted by footing;

FIGS. 5a to 5h are sectional views illustrating a process according to the present invention;

FIG. 6 is a sectional view illustrating how a gate oxide layer can be undercut in accordance with the prior art;

FIG. 7 is a simplified diagram illustrating a Plasma Enhanced Chemical Vapor Deposition (PECVD) apparatus for practicing the present invention;

FIG. 8 is a Fourier Transform-Infrared (FT-IR) spectrum of silicon oxime in accordance with the present invention;

FIGS. 9 and 10 are FT-IR spectra of conventional silicon oxynitride materials; and

FIGS. 11 and 12 depict the use of a silicon oxime film in accordance with the present invention as an ARC in forming a via.

DETAILED DESCRIPTION OF THE INVENTION

FIGS. 5a to 5h illustrate a process for patterning a material layer using a anti-reflective layer or coating which is formed in accordance with the present invention.

FIG. 5a illustrates a semiconductor structure at an intermediate step in the overall fabrication process, including a silicon substrate 40, a gate oxide layer 42 formed on the substrate 40, a polysilicon material layer 44 formed on the gate oxide layer 42, and an anti-reflective layer 46 formed on the polysilicon layer 44.

In the illustrated example, the polysilicon layer 44 is to be patterned to form a conductive gate for a field-effect transistor using photolithography. However, the present invention is not so limited, and can be applied to patterning any suitable semiconductor, metal, or other material layer.

The anti-reflective layer 46 is preferably formed of silicon oxime (SiNO:H), silicon oxynitride (SiON:H), or silicon nitride (Si.sub.3 N.sub.4 :H) . An anti-reflective layer of any of these materials is suitable for deep ultraviolet (DUV) photolithography at a wavelength of typically 248 nanometers, or more conventional i-line ultraviolet photolithography at longer wavelengths.

In a preferred embodiment of the present invention, the anti-reflective layer 46 is formed of silicon oxime in a Plasma Enhanced Chemical Vapor Deposition (PECVD) reactor to a thickness t of approximately 200 to 400, preferably 300 angstroms. The values of refractive index n and extinction coefficient k for the anti-reflective layer 46 are optimized for DUV photolithography at a wavelength of 248 nanometers. Preferred values of these parameters are n=2.1 to 2.2, and k=0.5 to 0.7. The relative proportions of silicon, oxygen and nitrogen in the anti-reflective layer 46 are selected to produce these values.

In FIG. 5b, a silicon dioxide barrier layer 48 is grown on the anti-reflective layer 46 using a nitrous oxide (N.sub.2 O) plasma discharge to convert a surface portion of the anti-reflective layer into silicon dioxide. This step is performed in-situ in the same PECVD reactor that was used to form the anti-reflective layer 46, thereby maximizing process throughput.

After formation of the anti-reflective layer 46, the container or chamber of the reactor is pumped down for typically 10 seconds, and then nitrous oxide gas is pumped into the container. RF power is applied to initiate and sustain a plasma in the gas which causes bombardment of the silicon oxime anti-reflective layer 46 by ion species from the nitrous oxide plasma such that a portion of the surface of the layer 46 is consumed by the reaction and converted into silicon dioxide.

The plasma growth process is continued for approximately 20 seconds which enables the silicon dioxide barrier layer 48 to be grown to a thickness on the order of 10 to 40 (more preferably 15 to 25) angstroms.

In FIG. 5c, a photoresist layer 50 is formed on the barrier layer 48, and a photolithographic mask 52 is positioned above or in contact with the photoresist layer 50. The mask 52 has an opaque area 52a which corresponds to the gate of the field-effect transistor, and transparent areas 52b. The photoresist layer 50 is optically imaged or exposed through the mask 52 such that a chemical reaction occurs in the areas of the layer 50 underlying the transparent areas 52b.

In FIG. 5d, the photoresist layer 50 is developed such that the portions thereof which were exposed to the imaging light are removed by the developing solution. Only a portion 50' of the layer 50 which was masked from the imaging light by the opaque area 52a of the mask 52 remains after development.

In FIG. 5e, the structure is exposed to an etching substance which has a low etch rate (preferably substantially zero) for the photoresist material, and a substantially high etch rate for the layers 44, 46, and 48. The etching substance is preferably a conventional gaseous mixture of carbon tetraflouride (CF.sub.4) and oxygen (O.sub.2). The result of this step is that the portions 44' 46' and 48' of the layers 44, 46 and 48 which underlie the photoresist portion 50' are masked or shielded from the etching solution, and the unmasked areas of these layers are removed. This results in patterning of the polysilicon layer 44, as well as the underlying gate oxide layer 42.

The photoresist portion 50' is stripped off in a step 5f to leave the structure as illustrated. Source and drain regions, as well as interconnects, encapsulation, and other elements of the field-effect transistor are formed in subsequent processing steps which are not the subject matter of the present invention and will not be described.

The structure of FIG. 5f can be used per se in applications in which it not necessary to remove the portion 46' of the anti-reflective layer 46 and the portion 48' of the barrier layer. However, the portion 48' of the silicon oxide barrier layer 48 may optionally be removed if required as illustrated in a step of FIG. 5g. This is preferably accomplished by exposure to a solution of hydrofluoric acid (HF) which is optionally followed by exposure to a solution of conventional Sulfuric Peroxide Mixture (SPM). The preferred concentration of hydrofluoric acid is 200:1, and the exposure time is approximately 45 to 60 seconds.

As illustrated in FIG. 5h, the anti-reflective layer portion 46' can also be removed to expose the portion 44' of the polysilicon layer 44 which functions as the gate of the field-effect transistor. This will enable direct ohmic vertical contact to the gate. The portion 46' is preferably removed using a phosphoric acid (H.sub.3 PO.sub.4) solution which is conventionally used for nitride stripping.

It will be noted in FIGS. 5g and 5h that the gate oxide layer portion 42' is not undercut as in the prior art process of FIG. 6. This is because the barrier layer portion 48' is sufficiently thin (10 to 40 angstroms) that significant undercutting of the portion 42' will not occur during the step of FIG. 5g. The length of time required to remove the portion 48' is insufficient for significant undercutting to occur.

The anti-reflective layer 46 and barrier layer 48 are preferably formed sequentially in-situ in a Plasma Enhanced Chemical Vapor Deposition (PECVD) reactor 60 which includes a container 62 as illustrated in FIG. 7. An electrically grounded susceptor 64 is suspended in the container 62. A silicon wafer 66 including one or more dies on which semiconductor structures such as illustrated in FIGS. 5a to 5h are formed is supported on the susceptor 64. Lift pins 68 are provided for placing the wafer 66 on the susceptor 64. The wafer 66 is heated to a suitable temperature by a heater 70.

A gas discharge nozzle which is known in the art as a shower head 72 is mounted in the container 62 above the wafer 66. A gas mixture 74 which is used to form the layers 46 and 48 is fed into the shower head 72 through an inlet conduit 76 and discharged downwardly toward the wafer 66 through orifices 72a.

Radio Frequency (RF) power is applied to the shower head 72 through a power lead 78. A blocker plate 72b is provided at the upper end of the shower head 72 to prevent gas from escaping upwardly. The RF power applied to the shower head 72 creates an alternating electrical field between the shower head 72 and the grounded susceptor 64 which forms a glow or plasma discharge in the gas 74 therebetween.

Preferred examples of process conditions for forming a silicon oxime anti-reflective layer 46 and silicon dioxide barrier layer 48 in a PECVD reactor such as illustrated in FIG. 7 will be presented below. In EXAMPLE I the reactor is an AMT5000 model which is commercially available from Applied Materials Corporation of Santa Clara, Calif. In EXAMPLE II the reactor is a Novellus Concept I System model which is commercially available from Novellus Systems, Inc. of San Jose, Calif.

It will be understood that these conditions are exemplary only, and that the conditions for forming these layers in a different model or type of reactor can differ substantially.

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